Chip123 科技應用創新平台

 找回密碼
 申請會員

QQ登錄

只需一步,快速開始

Login

用FB帳號登入

搜索
1 2 3 4
查看: 3852|回復: 2
打印 上一主題 下一主題

Configuration Management Engineer (Digital IC Design)請進來交流!

[複製鏈接]
跳轉到指定樓層
1#
發表於 2011-7-20 12:12:57 | 只看該作者 回帖獎勵 |倒序瀏覽 |閱讀模式
招聘公司:A famous IC company2 Q# b( z( c# y) ]; R
招聘岗位:(Senior) Configuration Management Engineer (Digital IC Design)' W1 v3 ?* m2 L# N0 k* ]0 {7 e
工作地点:Shanghai9 Q1 O1 _# D6 r: U/ z
/ Q3 a+ V% [- Z) t8 n/ P# z! F: B# Y
岗位描述:
/ ~" t; C$ f+ g$ ?7 i' Z3 |Duties · Do database management/configuration management to support Digital SOC product development for mobile phones · Administrate Clearcase /DesignSync · Administrate change control and bug tracking tools · Do linux/LSF compute farm/ CAD tool first-level support to Digital SOC design team and interface to company IT/CAD organization · Take charge of CAD investment request consolidation : n2 e8 N) W& d6 C" u0 v
+ @9 h& u# Z# J: b
职位要求:
8 Z- [- \# j7 l3 }4 D, [) nRequirements · B.Sc. degree or above in Semiconductor, Electronics Engineering areas · 2 years or above experience in Clearcase/DesignSync administration and configuration management in Digital IC Design domain · Good knowledge of digital SOC design is a big plus · Good knowledge of linux, LSF compute farm and script writing (e.g. C shell, Perl) · Good communication skill, will have frequent communication with foreign teams. · Good written and spoken English is mandatory.
+ t. W4 K& w  n7 i. a# o8 y' L" h2 W. V& ?# O' i& j- S. z
能者與意者請email研發簡歷與chip123聯絡。
分享到:  QQ好友和群QQ好友和群 QQ空間QQ空間 騰訊微博騰訊微博 騰訊朋友騰訊朋友
收藏收藏 分享分享 頂 踩 分享分享
2#
 樓主| 發表於 2011-7-20 12:15:58 | 只看該作者
招聘公司:A famous IC company* l! a# t4 f+ \5 u# S- L
招聘岗位:(Senior) Digital IC Design Engineer (FE Design)
+ p) M/ G! Q8 f  u- N5 A1 |; b3 ]2 l/ v2 `工作地点:Shanghai1 e& B( S# ]+ E

: `" e% C* x, x2 P( J3 H2 ^岗位描述:7 G! g) \, O" u: E
Duties • IP design and support for digital baseband of cellular phones • Digital SOC design and integration for chips
9 {8 Z7 t7 B; F8 ~& t
5 I. m+ z- e' G1 h" r- z职位要求:
/ T% C. [# d( D  y+ c1 L. g7 wRequirements • B.Sc. degree or above in Semiconductor, Electronics Engineering areas • 2 years or above design experience in industry • Good knowledge of design flow including documentation, VHDL/verilog coding, code check, equivalence check, synthesis, timing analysis and RTL simulation. • Good knowledge of AMBA AHB/AXI protocol is preferred. • Good knowledge in UPF/IP-XACT based design flow is a big plus. • Hands on experience in digital IC design EDA tools, such as NCSim/Questasim, Design Compiler, Formality, Primetime etc. • Good communication skill, will have frequent communication with foreign teams. • Good written and spoken English is mandatory.
3#
發表於 2012-4-16 11:36:53 | 只看該作者

Staff Engineer for Digital MAC Design

客户 A famous IC company
% T, K! k: u# d. ]) J地点 Shangha
( L& _2 u. I( `+ |8 P& ^- w! l( e5 d8 j( L' z0 Q3 Z
职位描述/ A( F; d, F' Q3 P4 D' A
We are looking for a person to join a design team to execute a state-of-the-art IC design project in the wireless communication field. Candidate must be familiar with digital IC design flow with a proven record of design and verification of a complex design project that led to successful silicon. Proficiency in Verilog is required.
8 C- c6 W; t2 ~: _: q* ?  E: y! |$ `# t/ P* x5 Y7 W
职位要求
# E2 K- L& [: P$ V+ }0 S, P) }Requirements:
* \: L7 l& m+ `3 NExperience in the following areas of expertise is desired:
. [5 F9 p4 \- N% w1 Q  |Wireless media access control (MAC) design experience would be highly desirable4 O) D. ^* O# x2 m+ e6 f! S
Knowledge of TCP/IP and DMA Offload Engine design experience will be a plus
$ M, X( ]6 L1 a+ r# k. GRTL design, verification, and chip integration
: x! b, ?. o/ U3 }Experience in the following is beneficial but not necessary requirement:
7 @5 x, ^1 F6 R, Q: b0 t2 c& E" ]$ aCommunication systems and RF systems7 ]& Z8 ]6 L7 d! y9 V, o
Familiarity with wireless communication systems and standards (802.11b/g/n and WiGig)
5 H( G/ d' }6 yKnowledge of interface protocols such as PCI/PCIe would be a plus2 X" |- H; n) f% S8 J' }" d) W/ O
FPGA design flow, testing, and emulation bringup1 \6 k/ u& k6 q* W1 R9 x: i4 g
" I1 I9 u3 R5 N
Other requirements:! y1 q" B; Z: S3 t1 t+ `7 E
Familiar with design and verification languages, EDA tools and ASIC/SOC design methodology
* Y+ j# Q: u& z) L: d" aGood script language skill, such as Perl, Tcl and Shell;
' ?* w1 s0 ?: `# JGood written and oral communication skills in English;   f5 o% j2 ^) n1 i1 Y
Good Team player
2 ?8 D! M7 J7 _4 @3 Y; V& u6 G6 `3 C* pCandidates must have MSEE degree with at least 5 years of experience
您需要登錄後才可以回帖 登錄 | 申請會員

本版積分規則

首頁|手機版|Chip123 科技應用創新平台 |新契機國際商機整合股份有限公司

GMT+8, 2024-11-16 08:41 AM , Processed in 0.158009 second(s), 17 queries .

Powered by Discuz! X3.2

© 2001-2013 Comsenz Inc.

快速回復 返回頂部 返回列表