Multi Core Debug Solution IP

jiming

IPextreme, Inc. / White Paper
* z' e( u* `0 y
! r% @/ f- ~. }+ N7 |White Paper Content：

$ W" W% ]- S2 `/ _  EThe speed and density of today's multi-core SoCs have outgrown traditional debugging methodologies. To debug a system in its target environment, where problems often only occur, a debugger needs access to an enormous amount of trace data from various processors, buses, and signals within the SoC. Getting this data off-chip to the debugger in real time requires on the order of 100 Gbits/sec of bandwidth at the chip I/O, which is not practical using either dedicated debug pins or shared debug/functional pins. The problem is further compounded by the need to analyze all of that data.
+ S; E) X3 G- [5 z/ p9 I
Infineon has successfully developed and deployed a technology known as the Multi-Core Debug Solution（MCDS）to address that problem. Using advanced on-chip trace techniques that include on-chip trigger generation, trace data compression, and trace storage, MCDS provides only the relevant trace data to the debug tool. Without adding pins to the chip, MCDS enables real-time, in-system debug and performance optimization.
0 F0 ?  E5 e( H$ c! Y  B6 A

遊客，如果您要查看本帖隱藏內容請回復

freeson

最近就是在開發multi-core的專案...想要喵喵看哈哈