Plunify技術副總裁暨創辦人黃瀚華 & B" v4 F. A+ \; ?* r
5 C8 A% [4 v' V在2009年共同創辦Plunify之前,黃瀚華曾分別在AMD超微半導體(Advanced Micro Devices)日本分公司與賽靈思(Xilinx)美國總部擔任設計工程師,負責開發行動電腦(Mobile PC)韌體(Firmware)以及基於FPGA的系統,在電子設計產業已累積超過十年的經歷。% p! B- h8 I' L0 Q7 F. A5 E0 D% x7 U
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黃瀚華擁有美國史丹佛大學(Stanford University)電機工程碩士,以及卡內基美隆大學(Carnegie Mellon University)電機與資訊工程學士的學歷。除了英文外,Harn Hua也精通中文與日文。) }: r1 t9 e+ p9 E
9 l0 p& Z& j9 c& {, k2 e, `) b- w7 r+ ]黃瀚華發表過的作品如下:
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ØAcceleratedSystem Performance with the APU Controller and XTremeDSP slices, XilinxApplication Note 717, Harn Hua Ng, Latha Pillai, 2005 http://www.xilinx.com/support/documentation/application_notes/xapp717.pdf
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G4 E* Y# | c ØPPC405Lockstep System on ML310, Xilinx Application Note 564, Harn Hua Ng, 2007 http://www.xilinx.com/support/documentation/application_notes/xapp564.pdf
5 w( M6 r+ Z5 A" `0 S) L& {: sØMinimalFootprint Tri-Mode Ethernet MAC Processing Engine, Xilinx Application Note 807,Jue Sun, Harn Hua Ng, Peter Ryser, 2007 http://www.xilinx.com/support/documentation/application_notes/xapp807.pdf % p0 c W& I; j
ØCloud-basedParallel Design Space Exploration using EDAxtend, DAC 2012 poster presentation,Harn Hua Ng, Cristopher Magalang, 2012 |