9 s1 i( r; ~7 d! a8 w5 ]- x' l1 iInvestigation on Robustness of CMOS Devices Against Cable Discharge Event (CDE) Under Different Layout Parameters in a Deep-Submicrometer CMOS Technology 3 \) M# J, S/ ` ! n. i9 h p; w3 f% k V
Abstract—Cable discharge events (CDEs) have been found ; M* e V. _+ F( B& c/ y( j$ u to be the major root cause of inducing hardware damage on , p9 Q5 F. k; |( l$ w% l Ethernet ICs of communication interfaces in real applications. Still, + G0 G% z; Q- n/ x; a2 a! A9 | there is no device-level evaluation method to investigate the ro. Z- G; |9 @& c% d- f! M6 Y
bustness of complementary metal–oxide–semiconductor (CMOS)& d. l1 I3 r3 |0 V. O# b$ ]
devices against a CDE for a layout optimization in silicon chips.