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本帖最後由 masonchung 於 2010-1-21 09:23 AM 編輯 , D2 { W- n6 |& D f- `4 v
: X: }! X, m; {# a G0 O! l, X7 ]- |C2 CC1200高清编解码芯片
; G4 ]' R( r4 Y, iCC1200 Media Processor Famiy
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* W0 {2 l' S1 NCC1200 Family* A% Z: x! N( c4 Q) F; m
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CC1200 is C2 Microsystems’ second generation media processor family for Full HD video applications. It is based on the innovative Jazz 2 architecture, which is optimized for next-generation high-definition broadcast services and broadband rich media applications. CC1200 decodes all current broadcast formats and a wide variety of Internet content formats and performs high quality audio post-processing and video de-interlacing and scaling for high-definition display. CC1200 transcodes content into several formats for place-shifting and for side-loading onto portable devices. CC1200 encodes video for video monitoring, video chat and place shifting applications. CC1200 has a dual-core Symmetric Multiprocessor (SMP) which, with hardware acceleration of graphics operations, delivers very high applications processing performance. 9 u+ \1 r' \* @- f: o* P* h
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Features/ F9 V. e( t- s; o
! u" q3 J6 Q& zHigh applications and media processing performance
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& R( \" D- p+ u3 S; E8 QDual Core SMP 4-way superscalar RISC architecture @ 350 MHz
D7 o! y7 f+ D0 N/ i" ]( e! M) RDual hardware threads per core ' H/ O5 {4 e4 d2 X" X$ K
256-bit SIMD Vector Unit
4 i, ^8 b4 D% o. p$ wCodec Acceleration Processors for digital broadcast standards + Y: A, }) X% C: N z3 H
Motion estimation, entropy engines
# x* V% I1 Y0 t4 n/ E- {8 Y [* f2D Graphics Accelerator with DirectFB, OpenVG 1.1 support
( A6 \9 a( E5 }5 {, D$ o9 PDisplay Processor 8 x$ i W. P X0 Z! J
Security Processor
. q6 M% V+ Q/ p$ cExtensive rich media codec support : N; V6 C& j1 G+ F/ r# [
8 C) w" ^6 o, R, M5 {) c0 `H.264, MPEG-2/4, VC-1, FLV, RM
E/ i0 E7 R0 C7 KDecoding of digital broadcast standards up to Full HD
8 x! Z/ C1 A7 U. \1 N2 f; n0 yDecoding of internet content standards up to 720p : W( s1 w8 [" b/ h8 t$ u. R* j
Encoding at D1 resolution and above " T9 C$ x! N- {9 ]
High level of device integration . x2 J C# O( E1 B2 F
C5 j# l$ H# L5 G, {6 vDRAM Memory: 64-/32-bit DDR2 @ 400MHz, 128-512 MB
1 e# O6 h% r: yParallel NAND Flash 7 S, l) S" A8 ]# o+ G# X. r- {
Ethernet 10/100/1000M MAC with RMII/RGMII interface " E# t9 `) {" t# Y! n+ S- y# O, ]
USB2.0 OTG
9 L# @0 p& C' t8 s( l0 NPCI-Express: Ethernet/WiFi
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MPEG-2 transport stream 3 B/ F. C1 @# F: q5 @
Digital A/V – HDMI, BT-656/BT-1120, SPDIF, I2S ; S: u5 F3 W" Z2 u/ e* f, N1 c
Analog Video Out – YPbPr, CVBS
; U5 Q" }! Q6 Q9 M( D& R9 E) w" ePackage: 27mm x 27 mm, Pb-Free
9 \8 U6 \" d4 T' z9 UCC1200 Block Diagram+ j6 |7 A( u) V, v8 D5 m
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Supported Standards
; \2 ~1 Y, m6 p" z. J' p! T( w1 DThe Jazz media processor architecture permits the encoding and decoding of a wide range of video and audio compression standards
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