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本帖最後由 masonchung 於 2010-1-21 09:23 AM 編輯 ( I1 M0 K2 M c7 u! T2 [. ?, {
- T% A, ]8 ~1 z! O, i: AC2 CC1200高清编解码芯片7 G. M Z) f9 u) a8 s6 V$ R
CC1200 Media Processor Famiy
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8 |# y% d* {+ e/ Y NCC1200 Family7 L d3 }# L) U+ }) k+ q
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CC1200 is C2 Microsystems’ second generation media processor family for Full HD video applications. It is based on the innovative Jazz 2 architecture, which is optimized for next-generation high-definition broadcast services and broadband rich media applications. CC1200 decodes all current broadcast formats and a wide variety of Internet content formats and performs high quality audio post-processing and video de-interlacing and scaling for high-definition display. CC1200 transcodes content into several formats for place-shifting and for side-loading onto portable devices. CC1200 encodes video for video monitoring, video chat and place shifting applications. CC1200 has a dual-core Symmetric Multiprocessor (SMP) which, with hardware acceleration of graphics operations, delivers very high applications processing performance. 6 b K* P- Z2 B$ b' b" J) V
& n* D% p0 W+ } nFeatures
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) ^/ C- s, h( s# a% A" Y3 BHigh applications and media processing performance
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6 b5 O4 U8 Q0 E0 l' xDual Core SMP 4-way superscalar RISC architecture @ 350 MHz
" b7 ?* O( \. l$ KDual hardware threads per core
! A" x |) r& ^, P% m256-bit SIMD Vector Unit
7 ~1 q. \; V6 V( q* DCodec Acceleration Processors for digital broadcast standards
4 _' D* X% s* C {7 lMotion estimation, entropy engines ( {/ t0 d+ u1 a) O+ L
2D Graphics Accelerator with DirectFB, OpenVG 1.1 support G) g& t5 T( v$ r( \
Display Processor
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Extensive rich media codec support + m2 G, z) N4 Q! e; Q" _
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H.264, MPEG-2/4, VC-1, FLV, RM
+ P% y& |( R" |- d! t8 VDecoding of digital broadcast standards up to Full HD
1 W& \0 F( i4 _% fDecoding of internet content standards up to 720p ( ?' y- ^) a$ q# U
Encoding at D1 resolution and above 9 F. D+ g' \2 f- v3 M/ y
High level of device integration
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: @! V `7 X/ A) L1 a9 gDRAM Memory: 64-/32-bit DDR2 @ 400MHz, 128-512 MB
+ k) H3 ^$ {1 v9 w; K' e2 U5 x* @. uParallel NAND Flash 2 ^( U7 v' h8 j% P8 t$ W3 J
Ethernet 10/100/1000M MAC with RMII/RGMII interface 8 N1 g' `9 x5 A6 |4 \
USB2.0 OTG
0 H5 p' g# x& N: z- B6 xPCI-Express: Ethernet/WiFi ' C. p0 Y! P1 b' e: [! b$ D
SDIO
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4 ~$ K# o, K) yDigital A/V – HDMI, BT-656/BT-1120, SPDIF, I2S / [+ U6 p& H0 ^) }
Analog Video Out – YPbPr, CVBS
& a9 u2 T! @ W7 w9 E! C3 vPackage: 27mm x 27 mm, Pb-Free
8 W. E+ w J0 J' y% FCC1200 Block Diagram
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Supported Standards
& F" S j( T% g9 mThe Jazz media processor architecture permits the encoding and decoding of a wide range of video and audio compression standards0 S7 S& h" C3 \# S4 R5 \
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