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Flip chip Manager level in China mainland

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發表於 2009-6-18 12:44:58 | 只看該作者 回帖獎勵 |倒序瀏覽 |閱讀模式
We are searching for flip chip R&D mgr, process mgr, project mgr for a well-known assembly and test house located in Shanghai, China. Below jd is for process mgr. Should you have any questions or concerns, please contact me by achris@edachr.com, 86-21-63203354, Achris Shen, we are a professional job-hunter company in semi market in China.+ i9 J* [* Q1 Z/ ~  B8 H

3 |0 G* f: _2 x5 FPurpose of the Job (Why the job exists):, R  s' h( X2 d: G
1.        To define and develop new packages and technologies through benchmarking and interaction with PLM.9 p7 s. q3 p$ k1 ]
2.        To manage projects for on-time development through effective resource allocation and planning for rapid deployment of new technologies and products.
- n! r1 G6 q2 d/ k8 A! `6 x' }( t3.        To transfer enabling technologies and products to relevant factories. # ~8 t1 \' m" ~
4.        To support and coordinate customer programs through interaction with customers and upper level management
  [; T9 p2 ^+ z0 d# H5.        Make a plan or roadmap for future demand in market or customer.8 V4 ~3 |( b. Q/ L

5 i8 ]7 F& p9 I% O9 l, p1 b! u. wKey Job Accountabilities (Actual daily deliverables):  C/ l( H2 d+ F7 N. X* J- r
1.  Communication with customers and Emerging technology/PLM.: y$ d; X3 q% ?  V/ z0 x
2.  Coordinate cross functional team activities
  d3 k: p& ?+ V5 E+ M- L9 F3.  Assign and review each engineering tasks and plans, or all project tasks and plans of project manager, ?, s9 B5 Q5 k; i. t, ~
4.  Ensure key deliverables are met for each stages of phase development procedure.
% _. u2 S; L( B9 s, C9 j+ o: _' m; a5.  Update and discuss key issues with upper level management3 ]0 d3 [0 U7 I, t' T
6.  Adjust plans and update / modify current activity / engineering direction based on engineering data.& A7 Y+ u: l4 N
7.  Patent infringement search & IP generation" i0 V# |- z. |# F+ w9 [; A, n" i. P

2 K# k: b+ ~9 D# i& s Reporting Relationships
- U7 ~# l6 _- v6 [Report to Director
8 V1 f- i* j: L0 gMTS, Senior Engineer, Engineer reports to this position
  y' b; g1 P$ ? 8 f9 A, T: R- j  R& S8 ?
Required Experience and Qualifications" ]  ?" G6 d% ]
1.        Minimum 8 years experience in FlipChip in both unit or strip form both as a similar position in a high volume and highly auto semiconductor operation.
! I' |: K, @1 \' v- r) f; M  [2.        Flip chip process integration experience (Die saw, FCA, UF, Molding, SBM, Marking). x9 ^0 `9 M: V% b! s2 z9 W; Y7 u
3.        Wafer bumping process
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