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這應該是APR的論文- N8 c* s# A/ o; \" @+ |
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; K' n4 g! f6 u$ MAbstract:& u7 s* i7 y- D* {6 V
Parasitic interconnect corner methods are known to , i0 G6 x- {3 s: J
be inaccurate. This paper explains the sources of their errors and
& h1 D! |/ s' A K# L3 F& xshows that errors in excess of 22% can occur in the predicted6 q; I6 ?4 j7 j3 ?) K
corner delays of a multi-layer stage in the presence of process: d1 ^' h6 w; O% X
variations. It is shown that exhaustive corner search methods are* G V! R0 k- {' o& j: F/ c S( T
infeasible in practice as they have an exponential complexity in
8 e4 q! V* J/ i2 O" P kterms of required SPICE simulations with respect to the number$ o3 D. c- ?! t" h; c
of layers a stage is routed through. This exponential complexity9 l1 a; k' K7 K: x% y; \5 O/ j
is reduced to a linear one with a new simulation-based search n* h6 o0 h8 C ^
method with the aid of stage delay properties. The ideas behind
$ N* j0 i" ^' S: q+ ~" X. ythe simulation-based methodology are shown to be expandable
: c3 r# K( I2 @7 x- _5 H2 U& j6 Eto an analytical-based multi-layer performance corner location$ s* J, {7 b8 b; Q8 O W, F
methodology. The simulated best/worst case delays based on these
; m# q& i! `' Z4 U3 u, Oanalytical corners produce errors below 4% as compared to the
: z" Q% p" Y/ y6 i3 qexhaustive search simulation based method.# u1 H8 B; ^+ f: m0 i# N, ~7 V% w
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[ 本帖最後由 masonchung 於 2008-4-22 12:01 AM 編輯 ] |
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