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這應該是APR的論文. A3 g7 v: F! m( X* }& y
- u6 A3 y6 ]% f. n+ y% c4 `, R1 e' }- L8 h, D- U
Abstract:
. a6 \" ^" V# ZParasitic interconnect corner methods are known to
8 F+ C$ m* Y0 d4 pbe inaccurate. This paper explains the sources of their errors and6 |8 m4 C4 Y& y) n2 K
shows that errors in excess of 22% can occur in the predicted
s8 V+ }* {$ P1 J6 _& c) Q& Icorner delays of a multi-layer stage in the presence of process
+ f: `8 W) T, @4 Y* `variations. It is shown that exhaustive corner search methods are& ~/ Z- R/ e" j4 s: J1 v0 k3 u
infeasible in practice as they have an exponential complexity in
; g6 T: O0 w8 Y! b; Q gterms of required SPICE simulations with respect to the number
# Q5 y( o9 @6 F5 a9 c2 q' n, Xof layers a stage is routed through. This exponential complexity9 ~, M$ J& l1 R4 _) s
is reduced to a linear one with a new simulation-based search c/ g" f7 Q3 ~; L
method with the aid of stage delay properties. The ideas behind
$ }3 T6 j8 s3 x# K/ u2 ^' athe simulation-based methodology are shown to be expandable6 r/ U6 a7 F0 c4 g: b
to an analytical-based multi-layer performance corner location
' w6 R& P8 b" v$ D; k$ h2 Gmethodology. The simulated best/worst case delays based on these. V8 I# I! m; h1 i' M1 E6 W' Q) i
analytical corners produce errors below 4% as compared to the
& f; H1 e3 C8 {exhaustive search simulation based method.. n7 c! i5 ]/ r/ G% f
Z+ z7 g3 ^8 n* e: N" O/ i[ 本帖最後由 masonchung 於 2008-4-22 12:01 AM 編輯 ] |
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