Chip123 科技應用創新平台

 找回密碼
 申請會員

QQ登錄

只需一步,快速開始

Login

用FB帳號登入

搜索
1 2 3 4
查看: 3219|回復: 4
打印 上一主題 下一主題

[問題求助] 论文翻译

[複製鏈接]
跳轉到指定樓層
1#
發表於 2008-4-21 13:36:31 | 只看該作者 回帖獎勵 |倒序瀏覽 |閱讀模式
soc的博士论文翻译,很多专业词汇偶没有头绪,求帮助:
1 n. I3 y: E* X( N: c  z. o- O' P% [! {8 P0 C. L( |
Multi-Layer Interconnect Performance Corners for Variation-Aware Timing Analysis
分享到:  QQ好友和群QQ好友和群 QQ空間QQ空間 騰訊微博騰訊微博 騰訊朋友騰訊朋友
收藏收藏 分享分享 頂 踩 分享分享
2#
發表於 2008-4-21 16:25:34 | 只看該作者
Can it find in IEEE ? $ e2 [6 V" {# K$ D7 e& x, M
Please give me the full name of  博士论文 , let's try to solve it
* l+ d+ b" c1 i, ^- ?+ e9 \. r. b+ [# c( n% Q% D
[ 本帖最後由 masonchung 於 2008-4-21 04:29 PM 編輯 ]
3#
發表於 2008-4-21 23:56:35 | 只看該作者
這應該是APR的論文. A3 g7 v: F! m( X* }& y

- u6 A3 y6 ]% f. n+ y% c4 `, R1 e' }- L8 h, D- U
Abstract:
. a6 \" ^" V# ZParasitic interconnect corner methods are known to                    
8 F+ C$ m* Y0 d4 pbe inaccurate. This paper explains the sources of their errors and6 |8 m4 C4 Y& y) n2 K
shows that errors in excess of 22% can occur in the predicted
  s8 V+ }* {$ P1 J6 _& c) Q& Icorner delays of a multi-layer stage in the presence of process
+ f: `8 W) T, @4 Y* `variations. It is shown that exhaustive corner search methods are& ~/ Z- R/ e" j4 s: J1 v0 k3 u
infeasible in practice as they have an exponential complexity in
; g6 T: O0 w8 Y! b; Q  gterms of required SPICE simulations with respect to the number
# Q5 y( o9 @6 F5 a9 c2 q' n, Xof layers a stage is routed through. This exponential complexity9 ~, M$ J& l1 R4 _) s
is reduced to a linear one with a new simulation-based search  c/ g" f7 Q3 ~; L
method with the aid of stage delay properties. The ideas behind
$ }3 T6 j8 s3 x# K/ u2 ^' athe simulation-based methodology are shown to be expandable6 r/ U6 a7 F0 c4 g: b
to an analytical-based multi-layer performance corner location
' w6 R& P8 b" v$ D; k$ h2 Gmethodology. The simulated best/worst case delays based on these. V8 I# I! m; h1 i' M1 E6 W' Q) i
analytical corners produce errors below 4% as compared to the
& f; H1 e3 C8 {exhaustive search simulation based method.. n7 c! i5 ]/ r/ G% f

  Z+ z7 g3 ^8 n* e: N" O/ i[ 本帖最後由 masonchung 於 2008-4-22 12:01 AM 編輯 ]

本帖子中包含更多資源

您需要 登錄 才可以下載或查看,沒有帳號?申請會員

x
4#
 樓主| 發表於 2008-4-22 12:28:19 | 只看該作者

偶是门外汉

对的哦,就是这篇
. B  }, S. [! O( b$ n! {很多专业词汇我不懂怎么翻啊
2 x4 a# T% T9 D' Z1 c4 K7 @- {; K+ o" ^+ S
the name of this paper:    Multi-Layer Interconnect Performance Corners for Variation-Aware Timing Analysis: o& V  K- }! F( |1 J7 z3 E
  w# \$ U2 [& q+ v7 |1 E
比如说:
! t7 Y4 Z2 J: u. WPerformance Corners
& S2 Z4 O6 T# g& I" LVariation-Aware8 t7 }1 o7 e8 i" V* l
stage
3 `9 e5 V6 s* @corner9 m7 B& y* ?. P0 N' k/ `1 \
之类的' B" o! _6 j& p  }# {( T
( ?& h+ O/ U' j5 g9 x
tx们帮帮忙啊
5#
發表於 2008-4-25 21:20:49 | 只看該作者
建議你可以到EDA設計或RD討論區發問
% w" x5 O) n3 h4 |! j: i或許可以得到較多回應哦  ^^
您需要登錄後才可以回帖 登錄 | 申請會員

本版積分規則

首頁|手機版|Chip123 科技應用創新平台 |新契機國際商機整合股份有限公司

GMT+8, 2025-2-24 07:05 PM , Processed in 0.161009 second(s), 19 queries .

Powered by Discuz! X3.2

© 2001-2013 Comsenz Inc.

快速回復 返回頂部 返回列表