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回復 4# 的帖子
1. Using technology file to create a library/ @) C6 k/ C" x, ?
2. Do stream in with cell type definition file. Specify some special layers' number. IE : Boundary Layer is 63.
6 }. h! |- _! G; j, F2 K8 L3. Open new created library, and create some metal blockage if need.* {! l# D3 {9 ~; w' ~( B
4. Do smash if need.
5 ?( }4 _7 ~# ~5 S# Z5. remove some unnecessary extension txst. IE VDD ---> VDD
) |. o! d2 |8 G- z1 m6. Define power,ground as well as in/out port
' ^* e c q# ^2 r! M$ e( ]- V7.Extract Blockage,Pin and Via by using command auExtractBlockagePinVia.
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, `9 R- Y$ `2 {1 u! D& [* M3 A4 Y3 ?) t' ZThe processes listed above is my method to do data preparation. Maybe someone know other best way for this issue. Please share it with us.3 o+ F, m' Y, w* H% d1 i( O( o
-->我要怎麼做才可以把 ANALOG中 重複性較高的部份交給 APR去做?
9 x A' j2 d3 M( }% H8 J7 @I don't understand your question. Do you want APR toll to place and route your analog block? It is a bad idea if your answer is yes. |
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