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回復 4# 的帖子
1. Using technology file to create a library
9 w0 V, u, X% C$ s, c/ t2. Do stream in with cell type definition file. Specify some special layers' number. IE : Boundary Layer is 63.
! O$ L9 l8 j6 _% d3. Open new created library, and create some metal blockage if need.# ~* M2 ?2 b* @
4. Do smash if need.
% B4 J+ ^1 A* h& G0 y5. remove some unnecessary extension txst. IE VDD ---> VDD
/ M' ]% e; b; |5 Q+ N6. Define power,ground as well as in/out port3 { @1 J2 W7 c' S- m( l8 B4 y+ X
7.Extract Blockage,Pin and Via by using command auExtractBlockagePinVia.9 _' u' g' x \! q E4 u$ H* v
) W. L% c/ x, a* P" EThe processes listed above is my method to do data preparation. Maybe someone know other best way for this issue. Please share it with us.
1 O2 |: F5 \" V-->我要怎麼做才可以把 ANALOG中 重複性較高的部份交給 APR去做?) B+ _# |9 `! P6 |# A5 m: N, V* B
I don't understand your question. Do you want APR toll to place and route your analog block? It is a bad idea if your answer is yes. |
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