|
|
某半導體大廠徵求Project Leader ( f9 V' l, [) O7 s5 B! p3 N
8 ?3 h. |7 t0 r. t- `
Title Responsibilities： 5 R/ [4 J E/ _
" k( \" n/ s; w4 H4 P' t1 d1. Coordination among CIS integration, module and product for next generation technology development
: @- s6 |! m- `" u8 v6 g2. Responsible for WAT analysis and pixel performance characterization. " L8 P$ E0 }7 Y k( s
3. Experiment design to optimize pixel performance and establishment in process baseline. % W& A; ?$ `4 j% }" s
( k/ ?3 S5 a P( i8 URequirements：# D5 N% E$ \) _9 P8 Y
( h; c& M6 b) `% F2 Y1 D- M+ V
1. Minimum bachelor degree in Electronics Engineering or related fields.
$ [0 {/ f b& q# q, K( \' ^& g2. Minimum 6 years of experiences in Memory product (DRAM, SRAM, CIS, NVP)4 R( M8 X+ e8 K4 n, Q
3. Candidate with integration experience are preferred.
$ D' N0 J, f8 w0 c; ?/ @4. Fluent in English.* Y6 [" p& B) o
5. Work location in Tainan, Taiwan., u9 n. w7 ^& Y( Y9 x- f
- m% z9 y5 X. p3 zPackage： around annual NT 300萬 ~700萬* T" x7 {0 g9 j" p) t) F* w
) B- b4 f5 S/ g$ E' j, l2 m
Stock：providing stock option depends on experience
5 Y' O. W' C8 I$ B; F7 Z: a' S
% n; Y3 P1 z" B% N# |意者請與 chip123@chip123.com.tw 聯絡！ |
|
IP卡
狗仔卡
發表於 2006-11-16 10:31:30
QQ好友和群
QQ空間
騰訊微博
騰訊朋友
收藏
分享
頂
踩
分享
提升卡
置頂卡
沉默卡
喧囂卡
變色卡
搶沙發
千斤頂
顯身卡