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某半導體大廠徵求Project Leader ' [, I% @% r( X" I4 `
7 d( j- }6 [7 U. |! Y' Q# vTitle Responsibilities:
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1. Coordination among CIS integration, module and product for next generation technology development
' a; k! ~# M0 ]4 i4 b2. Responsible for WAT analysis and pixel performance characterization. : l) M6 J0 J2 P+ P
3. Experiment design to optimize pixel performance and establishment in process baseline.
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Requirements:1 y, s7 K2 W; v
% C# s2 @3 [$ a3 c9 @' r/ ~1 b V* |1. Minimum bachelor degree in Electronics Engineering or related fields.8 \: W* `/ z; S3 y* X/ b/ D, |: @
2. Minimum 6 years of experiences in Memory product (DRAM, SRAM, CIS, NVP)- V& B6 Z U, ]! I1 |
3. Candidate with integration experience are preferred.# l i) \/ N: S4 v( h: _$ D
4. Fluent in English.& @- ?0 |& M9 [' _7 Q1 n
5. Work location in Tainan, Taiwan.
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5 }& Y: ]# {( l# CPackage: around annual NT 300萬 ~700萬, g0 ^2 j- Z. w; [) [- w7 r
- p% u- @; u3 jStock:providing stock option depends on experience
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4 d( d: u* j8 I% `' v0 q5 q意者請與 chip123@chip123.com.tw 聯絡! |
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