STD Cell Data Prepare 中 wire track 的問題?

hgby2209

Standard Cell 的 Data Prepare 的過程我會去做 axgDefineWireTracks
+ Q2 y  @" c3 M3 m4 T; A0 B2 p然後再做 axgCheckWireTrack 來 check wire track, 但是做完 axgCheckWireTrack  
之後卻有如下之 Meaasge:

******** Pin Access Analysis *******
** # Cell Masters    =  1000
+ G4 p# d* D! l7 f0 o* N* }  g4 F** # Ports (logical) = 2500
** # Pins (physical) = 2500
** # Pins with no good access point on Grid (V&H) =   5 ( 0%)
+ ]$ D8 ^. Q- M) y$ q% I% [** # Pins with no good access point on Ver-Grid =    5 ( 0%)

請問下面這兩句是代表什麼意思呢?
- \0 D* e. C! G+ y** # Pins with no good access point on Grid (V&H) =   5 ( 0%)
9 R% C8 U5 Q& u. c& ~* `** # Pins with no good access point on Ver-Grid =    5 ( 0%)

若是代表有錯誤的話是否要 Fix 呢?