Layout Optimization on ESD Diodes for Giga-Hz RF and High-Speed I/O Circuits

semico_ljj

Layout Optimization on ESD Diodes for Giga-Hz RF and High-Speed I/O Circuits
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semico_ljj

Abstract -- The diode operated in forward-biased condition has
5 E; ^% F- d3 L8 D, x) j4 O$ ybeen widely used as an effective on-chip ESD protection device at
! C1 {7 Q( F. m6 Y# o, W% TGHz RF and high-speed I/O pads due to the small parasitic
' p) a: [' X0 }9 I, Aloading effect and high ESD robustness in CMOS integrated
8 A6 R5 a: @- j( Xcircuits (ICs). This work presents new ESD protection diodes
realized in the octagon, waffle-hollow, and octagon-hollow layout
styles to improve the efficiency of ESD current distribution and
$ @$ ?1 p1 f# Q! dto reduce the parasitic capacitance. The new ESD protection
- Z6 }3 z; F7 h- s+ ~diodes can achieve smaller parasitic capacitance under the same
. F& `* \( K. e7 w1 sESD robustness level as compared to the waffle diode. Therefore,
% D4 v' h* z1 O/ v. ~the signal degradation of GHz RF and high-speed transmission
1 l# m& w; A9 H- L) M0 D2 R- T, c0 ocan be reduced due to smaller parasitic capacitance from the new
proposed diodes.

xp212125o

看起來有幫助
6 d, l; `/ A  r9 V- ~1 Q+ n7 n  g感謝分享
先下載來看看
) y( p% B$ l2 `( x- ]: }thank you ~

linyuejing

下載來看看
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; C  U  p* S% q: f下載來看看
下載來看看
應該有幫助
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caesarxl

谢谢楼主分享，非常感谢

oika_51

看起來有幫助
感謝分享

linger809

Abstract -- The diode operated in forward-biased condition has
been widely used as an effective on-c ...
semico_ljj 發表於 2010-6-25 08:50 AM

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3 F4 h# `0 J  J: g+ W不知道这种形式的ＩＯ有没有经过测试，实际的效果和预想的有多少的差别，thanks!

oscargo

正為ESD耐受度傷腦筋----

zhifj86

thank you very much for your sharing

sslin

謝謝大大的分享~~知識因分享而壯大！
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