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補充:4 L, T# U, H2 E8 ^
1. Reference Library: the reference libraries or Process Design Kits (PDK) where the symbol views of master cells are present. 既你想要用的symbol是來至哪個 library.
. ?6 w! ?# t9 O% n% g2. Syntax for Specifying Device Maps in a Device-Map File:
: X/ h9 U, ^3 y1 D! y devMap := <primitive_device_name> <mapped_device_name>* S8 S: y; D7 J; c; r
[ propMatch := list_of_prop_to_match ]- L/ u8 h& e2 O5 C6 M) n% I1 ]) L
[ termMap := list_of_terminals_to_map ]2 X7 S5 i0 _. L5 D
[ propMap := list_of_properties_to_map ]
: [9 R" J. {* s, N# K% \- c [ addProp := list_of_additional_properties_to_map ]8 I# X( m& U9 w' H, A, \
Example:7 R8 J& t: h" f6 F
devMap := resistor res |: V7 A& `2 w7 J6 C) C
propMatch := r 200000 N. M6 y7 c. O+ q( B$ g9 @* O! r% T, B
termMap := PLUS PLUS MINUS MINUS% V: d1 C; Z3 J- o
propMap := subType type r resVal w width l length ]1 z: T4 T8 W0 y0 Y+ y
addProp := model res |
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