11/24 3DIC Design, EDA, and Architecture技術研討會

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由於3D IC技術能使電子產品尺寸縮小、增加電子元件效能、異質整合與降低成本等特性，使得全球相關產業、研究機構與學術界紛紛投入大量人力進行3DIC技術之研究與發展。然而，在3D IC整合時，其基礎架構、輸出/入介面，以及設計、測試方法等議題仍待克服，有鍵於此，AMPA聯盟特別邀請自美國來清華大學擔任客座教授之謝源博士於11月24日蒞臨工研院，針對3DIC設計、EDA與Architecture作深入探討，歡迎從事3DIC相關人士或對此課程有興趣者報名參加！
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; I) @9 O7 T! Y時    間：99年11月24日（星期三）13:30至16:30 (13:10開始報到)
地    點：工研院51館2B會議室 (新竹縣竹東鎮中興路四段195號，電話︰03-5918062)
/ }1 c9 t& t* P7 K( I主辦單位：工業技術研究院電子與光電研究所
協辦單位：先進微系統與構裝技術聯盟(AMPA)
講    師：謝源(Yuan Xie) 教授
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" }3 ~! e& v2 E4 I$ _3 X4 u! A. p•Yuan Xie received the B.S. degree in electronic engineering from Tsinghua University, Beijing, in 1997, and the M.S. and Ph.D. degrees in electrical engineering from Princeton University in 1999 and 2002, respectively.
1 K% ~$ @9 K2 \- n3 A0 \•He is currently Associate Professor in Computer Science and Engineering department at the Pennsylvania State University. Before joining Penn State in Fall 2003, he was with IBM Microelectronic Division's Worldwide Design Center.
•Prof. Xie is a recipient of the National Science Foundation Early Faculty (CAREER) award, the SRC Inventor Recognition Award, IBM Faculty Award, and several Best Paper Award and Best Paper Award Nominations at IEEE/ACM conferences.
& v) w. A4 |) J$ M2 ~•His current research projects include: three-dimensional integrated circuits (3D ICs) design, EDA, and architecture; emerging memory technologies; low power and thermal-aware design; reliable circuits and architectures; and embedded system synthesis.

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時 間	議 題 名 稱	講  師
13:10~13:30	Registration
13:30~13:40	Opening	駱韋仲組長EOL/ITRI
13:40~14:50	3DIC Design, EDA, and Architecture (I) • Overview • 3D Integration emerges as an attractive option to sustain Moore's law. • The progress in 3D IC designs, including both design tools perspective and architecture design perspective.	謝源(Yuan Xie) 教授
14:50~15:10	Break
15:10~16:30	3DIC Design, EDA, and Architecture (II) • Design automation and test techniques and methodologies for 3D designs are imperative to realize 3D integration. • What application could dramatically benefit from 3D stacking technology or what novel applications are enabled by 3D technology.	謝源(Yuan Xie) 教授

【報名資訊】

報名費用：

一般學員每人新台幣1,000元。

AMPA聯盟享有5名人員免費，第6人起每人新台幣500元 (含稅、講義與餐點)。

付費方式

電匯銀行：戶名：財團法人工業技術研究院(銀行代碼：005)

帳號：土地銀行工研院分行156005000025（電匯方式請務必先傳真收執聯）

劃撥帳號：戶名：財團法人工業技術研究院-電光所

帳號：19614517（電匯方式請務必先傳真收執聯）

郵寄地址：新竹縣竹東鎮中興路四段195號11館336室 周惠珍 收

報名截止日期：因座位有限，請及早報名，額滿為止。

聯絡窗口：(03)591-8062周惠珍小姐，e-mail：hui_chen@itri.org.tw