Design of High-Voltage-Tolerant ESD

semico_ljj

Design of High-Voltage-Tolerant ESD Protection
Circuit in Low-Voltage CMOS Processes

IEEE TRANSACTIONS ON DEVICE AND MATERIALS RELIABILITY, VOL. 9, NO. 1, MARCH 2009
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ritafung

IEEE TRANSACTIONS ON DEVICE AND MATERIALS RELIABILITY, VOL. 9, NO. 1, MARCH 2009

0 s: c9 d5 q1 }/ p% `; a0 C9 U這個是2009年嘛... 那麼快便有下載?
謝謝分享!

CHIP321

High-low Voltage-Tolerant IO,这种接口中文是怎么翻译的？多篇论文里提及，能否有大大帮忙解释下？
* u. ^% r: ]" S万分感谢。