Chip123 科技應用創新平台

 找回密碼
 申請會員

QQ登錄

只需一步,快速開始

Login

用FB帳號登入

搜索
1 2 3 4
查看: 4391|回復: 2
打印 上一主題 下一主題

free DRAM controller~~~MPMC2

[複製鏈接]
跳轉到指定樓層
1#
發表於 2007-7-24 12:43:37 | 只看該作者 回帖獎勵 |倒序瀏覽 |閱讀模式
MPMC2's features including: ' b( S8 Y6 N8 ], Z, u7 l

/ V$ L2 x/ Q( K" ^" U$ I9 x2 rNumber of ports (Scalable from 1 to 8)
9 k4 b3 b! U( R8 R( ^7 zType of memory (e.g. DDR, DDR2, user defined)
; U9 [# M6 P# I; ^Width of memory (8, 16, 32 or 64-bit)
8 V5 Z4 N% o% Y  o4 r& XVarious Port Interface Modules (Processor Interfaces, DMA engines, Standalone, etc) - H9 a  N4 U% i1 o( M- ]
Memory device part number " ?! p: I4 ?% t. G6 u* @
Arbitration methodology 5 v7 J2 I& Q! M6 Y: L7 \& F) V) {( D
Selectable pipeline stages for frequency matching 2 n8 y( Q/ `5 r5 v
Example system topologies using MPMC
( f2 s1 Q3 a4 c1 y
! z+ d( O) `( ~6 @( i% b0 ^MPMC2 extends the range of possible solutions by providing designers additional design capability for higher performance and/or advanced system topologies. System topologies can be built utilizing different types of Port Interface Modules (PIMs) on a per-port basis.8 ]. i2 U6 T$ p* O) b

8 ~9 H. [" p: H
- ^) H. X& I6 v0 u- @8 oThese seven types of PIMs are presently supported:
5 R! \$ a0 A* i/ B* S$ T, r" I% U- t2 }7 u; z" N
IBM™ CoreConnect™ Processor Local Bus (PLB PIM)
7 t& z0 `5 V4 M8 c) [IBM CoreConnect On-chip Peripheral Bus (OPB PIM) : ~) K4 p, R7 b
PPC405 Instruction Side Processor Local Bus (ISPLB PIM) $ L4 N7 L* y! n; P( x5 o6 ]; \" x
PPC405 Data Side Processor Local Bus (DSPLB PIM)
  i' J$ H: v6 F% B+ a: @Communication Direct Memory Access Controller (CDMAC PIM)   D4 N) |8 w1 `6 G
Native Port Interface (NPI PIM) ; b! T! U: G: }
Xilinx MicroBlaze™ CacheLink (XCL PIM)
$ P4 C. T8 G. t/ J
- G/ T/ [8 M3 H' ^% i  y1 dThe four pictures below represent a small sampling of possible system topologies:
; I0 f6 J6 j% o5 l+ o0 Q
. \5 }/ W2 o/ g9 @: Z8 ^
4 D. l/ Z' P( f0 nFigure 1. Example MPMC2-based system topologies. + G" J; M9 g0 H" p3 T
  " W, T9 e2 ]* R8 o$ }. s: W
Applications- |3 D' N/ u/ O

+ g& I: p* w% ?$ D9 A8 X' C8 w8 SMPMC2 enables users to deploy Xilinx products for many new applications in the storage, server, telecommunications, and wireless market. As shown by the above topology examples, the MPMC2 enables designers to create solutions for DSP, high performance multi-processor based systems and standalone applications. Based on the architectural needs, the MPMC2 configuration GUI provides designers options to choose various memory interfaces and system topologies that build upon the standard capabilities provided within Xilinx Platform Studio./ V- i" J! f' D* d5 H* ]- Q& y6 o) g, K
   
5 @9 R2 l# t$ k# ]& V' u9 x; V& S  ) t. l, C0 I  ]5 p/ d

. m6 H/ I! N' I) v
7 r1 [4 Z8 \4 L0 PGigabit Ethernet Bridging to Fibre Channel or S-ATA Hard Drive Example

本帖子中包含更多資源

您需要 登錄 才可以下載或查看,沒有帳號?申請會員

x
分享到:  QQ好友和群QQ好友和群 QQ空間QQ空間 騰訊微博騰訊微博 騰訊朋友騰訊朋友
收藏收藏 分享分享 頂 踩 分享分享
2#
 樓主| 發表於 2007-7-24 12:46:46 | 只看該作者
簡單的說MPMC2沒有MIG的強, 但是MPMC2是giga bit ethernet reference disign的一部分再獨立分出來的, 因此至少是充分驗証過的, 在實用上也比較大一點, 不過內建的DMA controller跟arbiter似乎是很值得用的東東
3#
 樓主| 發表於 2007-7-24 12:48:03 | 只看該作者
忘了講MPMC2的全名了, 全名是multi-port memory controller version 2啦
您需要登錄後才可以回帖 登錄 | 申請會員

本版積分規則

首頁|手機版|Chip123 科技應用創新平台 |新契機國際商機整合股份有限公司

GMT+8, 2024-11-16 06:42 AM , Processed in 0.155009 second(s), 18 queries .

Powered by Discuz! X3.2

© 2001-2013 Comsenz Inc.

快速回復 返回頂部 返回列表